Pearl Semiconductor is developing a complete full-breadth of timing products based on its patented SpurFree™ technology to serve all verticals of the datacenters connectivity market. Next-Generation datacenters connectivity standards require Ultra-Low Noise Timing Solutions with outstanding spur-free phase noise behavior and extremely low integrated phase jitter, typically 90 fs spur-inclusive. Our portfolio is designed to meet these demanding requirements and includes various families of programmable reference clocks, clock generators, clock buffers, and jitter attenuators.
The PRL51X is a Quartz Crystal based Ultra-Low Noise Programmable Any-Rate Family of XOs, VCXOs and Tight Stability XO (TS-XO). This family is based on Pearl's patented SpurFree™ Technology, delivering outstanding spur-free phase noise and extremely low integrated phase jitter. With an integrated jitter of 83 fs for frequencies up to 3000 MHz and stability of ±3 ppm in TS-XO mode, the PRL51X is designed for high-performance applications in demanding environments. It comes in a proprietary plastic package that integrates the CMOS die and the quartz crystal, offering superior performance and reliability.
To learn more about the PRL51X family, please read more.
To learn more about the PRL50X family, please read more.